The design of semiconductor devices has experienced rapid progress in accordance with the wide use of information process apparatuses such as computers. This progress has lead to the development of semiconductor devices that can function at high operating speeds and that have large storage capacities. In order to satisfy such requirements, semiconductor devices with increased density, reliability and response time are under development. Thus, the size of all kinds of patterns formed on the semiconductor devices is reduced, and the size of gaps in the patterns greatly decreases.
Generally, because various conductive patterns are formed on a silicon substrate in the semiconductor manufacturing process as transistors and various metal wirings, insulation films are interposed between the conductive patterns. The insulation film is formed on the substrate to cover the conductive patterns, and then is planarized to fill gaps between the conductive patterns. This planarizing process becomes more important in order to completely fill the gaps between the conductive patterns with the insulation film.
Boro-phosphor silicate glass (BPSG) is widely employed to form the insulation film because BPSG may fill the gap between the patterns, and may have a level surface by thermally treating the BPSG after deposition of BPSG on the substrate. However, BPSG may not be easily employed because a high temperature reflow process is required in order for the deposition of BPSG to fill the gap between the patterns. Furthermore, the etching rate of BPSG is too rapid so that the insulation film composed of BPSG has little significant thickness.
To form an insulation film on a semiconductor substrate, there are processes that utilize high-density plasma chemical vapor deposition (HPD-CVD) oxide and ozone-tetra ethyl ortho silicate (O3-TEOS). HDP-CVD oxide and O3-TEOS are widely employed for a shallow trench isolation (STI) process or a pre-metallic dielectric (PMD) process to fabricate a semiconductor device having a design rule of below about 100 nm. However, HDP-CVD oxide and O3-TEOS may not fill up a gap between patterns formed on a substrate.
Flowing type spin on glass (SOG) is used for forming an insulation film because SOG fills gaps between patterns to thereby prevent voids from forming in the insulation film. As for the process for forming the insulation film using SOG, a polysilazane-based material is coated on a substrate including the patterns by a spin coating process and the polysilazane-based material is changed to a silicon oxide (SiO2) film by a hardening process in which oxygen (O2) gas and water (H2O) vapor are provided at high temperatures. Thus, when the process for forming the insulation film is performed using the polysilazane-based material, the cost of the process may be reduced. This silicon oxide film made from the polysilazane-based material is thermally and chemically stable in comparison with a conventional SOG film so that the silicon oxide film of the polysilazane-based material is effectively used as a shallow trench isolation (STI) film and an interlayer insulation film in a semiconductor manufacturing process. Japanese Laid-Open Patent Publication No. 2001-308090 and Korean Laid-Open Patent Publication No. 2002-68672 propose methods of filling a gap between patterns using polysilazane. However, the above-mentioned polysilazane compositions have a high weight average molecular weight (greater than about 3,000). Although polysilazane having weight average molecular weight of about 5,000 may be used to fill gaps between patterns, the resulting insulation film of this polysilazane may be porous when this polysilazane of high molecular weight is employed in a semiconductor device having a design rule of below about 20 nm. Polysilazane having weight average molecular weight of about 5,000 typically has an average molecular size of about 4 nm. Voids may be formed in the insulation film when gaps between the patterns are filled with polysilazane having the average molecular size of about 4 nm. Thus, when the insulation film of polysilazane having high molecular weight is etched and cleaned to form contact holes therein, undesired portions of the insulation film might be etched, yielding contact holes that are connected to each other. As a result, failure of a semiconductor device may occur due to electric short between contacts formed in the connected contact holes.